1. Field of the Invention
The present invention generally relates to analog-to-digital converters and it particularly relates to an analog-to-digital converter in which analog signals are converted to digital signals in such a manner that the analog signal is converted a plurality of times.
2. Description of the Related Art
As an example of a circuit for converting the inputted analog signals into the digital signals, there is available a pipeline-type A-D converter. A pipeline-type A-D converter is configured such that sub-A-D converters of low bits are connected in a plurality of stages. The inputted analog signal is A-D converted in stages through the respective sub-A-D converters. Each sub-A-D converter is provided with a plurality of comparators, and each comparator compares the inputted analog signal with the reference voltage so as to convert the analog signal into the digital signals.
When the inputted analog signal is to be A-D converted from the higher-order bit to the lower-order bit in stages, a redundancy range is provided in the sub-A-D converters. As a result, the result of conversion to the higher-order bits can be corrected based on the result of conversion to the lower-order bits. However, the A-D conversion terminates when the conversion to the least significant bit has been done. Thus, the above-mentioned correction will not be performed on the result of conversion to the least significant bit. This will directly affect the precision of the analog-to-digital converter as a whole.